On-Package Decoupling Capacitor Performance Improvement of Flip-Chip Packages for High Power Application

This paper presents the performance evaluation of on-package decoupling capacitors in point of the path inductance, and compares the power noise performance based on fixed on-package decoupling capacitors design among 4-2-4L, 5-2-5L and 4-2-4L coreless three different substrates. It is found that the performance of PDN suppression and power noise mitigation by decoupling capacitors will be better once the power plane is well designed which reduces the path inductance of the capacitors.