Simulation Study of Novel Trench Gate U-Shaped Channel SOI Lateral IGBTs With Suppressed Gate Voltage Overshoot and Reduced di/dt

The gate voltage overshoot during the turn-on transient in the trench gate U-shaped (TGU) channel silicon-on-insulator lateral insulated gate bipolar transistor (SOI-LIGBT) is investigated and novel structures are proposed for the first time with numerical simulation in this article. The TGU SOI-LIGBT features two U-shaped trench gates, G1 and G2, connected together. The U-shaped trench for G2 serves as a hole barrier trench. A large number of holes accumulate in the U-shaped region during the turn-on transient because of the U-shaped architecture and the hole-blocking effect of G2. The displacement current induced by the nonuniform distributed holes overcharges the gate and leads to high di / dt . In this article, the novel structures (Novel-1 and Novel-2) with G2 partially filled by the polysilicon are proposed for the improvement in gate voltage overshoot while keeping superior turn-on loss ( ${E}_{ \mathrm{ON}}$ ). The novel structures (Novel-1 and Novel-2) can suppress the hole accumulation and slow down the rising of the electric potential in the silicon region near the G2. The di / dt can be lowered and the displacement current that overcharges G2 can be effectively shielded. Compared with the conventional TGU structure, the di / dt of the Novel-2 are improved by 56.3% at the same ${E}_{ \mathrm{ON}}$ of 2.4 mJ/cm2.