An SNS technology process for ramp junction based digital superconducting circuits

The SNS (Nb/HfTi/Nb) ramp junction technology process has been improved for digital superconducting circuit operation. DC interferometers were realized on an isolated superconducting ground plane, connections being realized through windows in the insulation layers. The inductances of superconducting Nb striplines (widths w down to the sub-/spl mu/m range) were measured. For a 250 nm SiO/sub 2//Nb-oxide insulation layer, the sheet inductances of striplines were determined at 0.382 /spl plusmn/ 0.009, 0.340 /spl plusmn/ 0.005, and 0.293 /spl plusmn/ 0.008 pH (stripline widths: 1.5, 1.0, 0.54 /spl mu/m) and compared with data calculated by different inductance evaluation programs. The Josephson junctions used in the interferometers exhibit a critical current density of j/sub C/=525 kA/cm/sup 2/ and a characteristic voltage of V/sub C/=95 /spl mu/V. The design of an RSFQ converter circuit was developed on the basis of SNS ramp junction technology. For circuit applications the critical current density j/sub C/ was set to 150 kA/cm/sup 2/.