Low Drift Zener-based voltage reference

This paper presents an alternative architecture for a Monolithic IC Buried Zener-type voltage reference implemented on a 0.6μm BICMOS process. Low supply voltage, good power supply rejection, reduced process dependency, low Long Term Drift (LTD) with capability of an easy and effective Temperature Coefficient (TC) trim are all features of the presented architecture. Good simulated performance and very promising silicon results with standard deviation of 9.31mV, a mean value of 4.786V and temperature coefficient after trimming of less than 1.5ppm/°C were obtained for all tested parts.