40 Gb/s ASIC switch design using low-jitter clock recovery
2001
A 32/spl times/32 switch ASIC has 40 Gb/s aggregate throughput. The switch fabric is realized in three stages using full-custom clock recovery and transmit ports at 1.25 Gb/s. 18 ASICs fabricated in 0.18 /spl mu/m CMOS technology and packaged in 352-pin flip-chip BGA dissipate 160 W.
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