Analysis of high-Q on-chip inductors realized by wafer-level packaging techniques

Thin-film Wafer-Level Packaging (WLP) techniques have been used to realise high-Q on-chip inductors on 200hm.cm Si wafers, The electromagnetic analysis has been completed using the 3-D field simulator HFSSm. A very good agreement has been obtained between the experiments and simulations. Further simulations have been performed to investigate the influence of the Cu and dielectric thickness, substrate-material, etc., which may be used as guidelines for further performance improvement.