Cadmium selenide thin‐film transistors

Vacuum‐deposited CdSe thin‐film transistors (TFT’s) with reproducible good stability, performance, uniformity, and yield were made using sputtered SiO2 gate insulator, Cr source–drain (s–d) electrodes, and postdeposition annealing in N2. These materials and procedures permit the use of multiple pumpdown fabrication methods with no loss in ac characteristics and little sacrifice in dc stability. Promising results were obtained using photolithography (PL) to delineate s–d electrodes, further simplifying fabrication. The dc instability is electron‐trapping type and the drain current decay exhibits a logarithmic time dependence. The slope of this decay curve is used as a parameter to describe device stability and its dependence on the fabrication methods studied: M=0.03–0.06 for one‐pumpdown devices, 0.05–0.08 for multiple pumpdown TFT’s, and 0.1–0.2 for TFT’s with PL‐delineated s–d electrodes. Preliminary reliability studies show that suitably encapsulated TFT’s have long time stability comparable to the goo...