Detection of Hardware Trojans using Machine Learning in SoC FPGAs

In this paper, a hardware trojan detection technique was proposed and implemented. Initially, different hardware Trojan benchmarks based on AES encryption are collected and each of them was separately simulated using vivado design suite. The simulated code was synthesized and implemented on the SoC FPGA board. After the writing of the bitstream for the benchmarks, the temperature and voltage values are estimated and separately saved so that the values are used as the dataset for the next phase. In the next phase, a supervised classification technique is utilized. A neural network is trained with the help of the data collected from the various benchmarks. The created model is tested against new data benchmarks which are having Trojans and not having Trojans and their accuracy was evaluated.