Microstructure-induced Schottky barrier effects in barium strontium titanate (BST) thin films for 16 and 64 Mbit (DRAM cells)

The current-voltage and capacitance-voltage characteristics of fine-grained, ceramic BST thin films for ULSI (ultralarge-scale integrated) DRAM (dynamic random-access memory) applications are examined. A model and pertinent data for integrated BST capacitors used in 16/64-Mb DRAM cells are presented. The results confirm in detail the conclusion of R. Waser and M. Klee (1991, 1992) that conduction in ceramic SrTiO/sub 3/ is Schottky-dominated and that the Schottky barriers arise from depletion regions at grain boundaries and not only at the ferroelectric/electrode interface. >