Design of high reliability RF-LDMOS by suppressing the parasitic bipolar effect using enhanced p-well and double epitaxy*
2015
A laterally diffused metal-oxide-semiconductor (LDMOS) device design with an enhanced p-well and double p-epitaxial structure is investigated for device ruggedness improvement while keeping its high device performance under high frequency. Based upon the device design, radio-frequency (RF) LDMOS transistors for GSM (global system for mobile communication) application have been fabricated by using 0.35 μ m CMOS technologies. Experimental data show that the proposed device achieves a breakdown voltage of 70 V, output power of 180 W. The RF linear gain is over 20 dB and the power added efficiency (PAE) is over 70% with the frequency of 920 MHz. In particular, it can pass the 20 : 1 voltage standing wave ratio (VSWR) load mismatch biased at drain DC supply voltage of 32 V and output power at 10-dB gain compression point (P 10dB ). The device ruggedness has been remarkably improved by using the proposed device structure.
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