A monolithic CMOS automatic biasing system for 40GHz multistage HEMT

The design of an automatic biasing system for High-Electron-Mobility-Transistors is here presented (HEMT-Biasing-System, HBS). The HBS automatically regulates the operating point of an off-chip multistage HEMT block. A proper automatic algorithm is implemented in order to maximize the HEMT transconductance (g m ) efficiency (defined as g m /I DS ratio). This is an important feature in several HEMT-based systems, since they are used in LNA stages, where noise/power trade-off is a key aspect. Interfacing CMOS and HEMT technologies features several design issues, like negative gate-source voltage (to be managed by a CMOS circuits for HEMT switch-off operation) and closed-loop stability (due to the presence of very large off-chip capacitance - 100nF). The System here presented manages all these issues with tailored circuit solutions. A prototype has been designed in CMOS 0.35μm technology. It consumes 6.2mW (excluding the current consumption for HEMT driving).