Performance improvement of Ge fin field-effect transistors by post-fin-fabrication annealing

We demonstrated post-fin-fabrication annealing (PFA) as a recovery process for suppressing plasma-induced damage (PID) in Ge fin field-effect-transistors (FinFETs) after the Ge fin fabrication. There are two key points in the PFA process. One is an annealing temperature (≥600 °C) higher than the recrystallization temperature of Ge for the curing of PID. The other is that a SiO2 film is capped on the Ge fin to prevent GeO desorption. Furthermore, we investigated the impact of PFA at 600 °C–800 °C on the electrical characteristics of Ge FinFETs. The PFA process improves the subthreshold slope and the on current in Ge n- and p-type FinFETs and reduces the off current. We found that the optimum PFA temperature is 600 °C in this experiment because of the minimum thermal expansion between Ge and SiO2.