Fabrication of silicon-on-insulator with high uniform top Si for silicon photonics applications

Abstract Silicon-on-insulator (SOI) is the most suitable platform for silicon photonics applications owing to its unique structure and excellent compatibility. To satisfy the requirement of uniformity, HCl etching process is developed to smooth the surface of top silicon layer in this paper. The top silicon mean thickness is thinned down to 220 nm; the corresponding root mean square roughness is as low as 0.165 nm after the etching process, which is comparable to chemical mechanical polishing (CMP) process. Furthermore, HCl etching process shows great repeatability of thickness range and removal amount. The within wafer thickness range can be controlled below 30 A and the removal amount can be controlled within ±4.5 A, which is far better than conventional CMP process.