Electrical properties of Metal-Ferroelectric-Insulator- Semiconductor-FET using SrBi2Ta2O9 film prepared at low temperature by Pulsed Laser Deposition

Abstract We fabricated a Metal-Ferroelectric-Insulator-Semiconductor-FET with an SBT/SiON/Si gate structure, where SBT is prepared by Pulsed Laser Deposition at a low temperatue of 500°C and SiON is directly grown on Si in N2O gas at 970°C. A fabricated SBT/SiON/Si diode has an excellent interface between SiON and Si with interface stated density of about 3 × 1011 cm−2 eV−1 and a counterclockwise hysteresis with a large memory window of about 3.2 V. The corresponding MF(ON)S-FET has also a large memory window of about 3.1 V, subthreshold leakage of 10−9 to 10−8 A and an Id(ON) to Id(OFF) current ratio of about 4 orders of magnitude. The observed hysteresis in the MF(ON)S-FET is found to be originated from ferroelectric polarization reversal from the result of the sweep rate dependence of gate voltage from 0.2 V/s to 40 kV/s and of the relation between the memory window increase and applied gate voltage width, and the measured retention time of the MF(ON)S-FET is around 104 sec.