Universal asynchronous serial extended chip of multi-bus interface

The utility model discloses a multi-bus interface extended chip with general asynchronous serial ports, comprising a host interface, a subchannel processing module, a MODEM control logic module, an interrupt control logic module and a clock generator. The utility model is characterized in that the host interface comprises a 8-bit parallel bus interface, a serial peripheral interface SPI bus interface, a UART bus interface, an internal integrated circuit bus I2C bus interface, a protocol processor, a global register and a mode selection control logic module, wherein the four bus interfaces are all connected with the CPU/DSP host and the bus type corresponding the host is selected through the bus processing logic, in addition, the data and the conversion of data format are processed through the bus processing logic. The working state of the host interface of the chip is setup by the global register and the mode selection, the mode selection control logic module selects the host interface and the signal line through mode. The utility model supports 8-bit parallel bus, SPI bus, I2C, UART and other host bus interfaces, realizes a plurality of extended serial ports for buses, besides, the utility model has compact and perfect configuration register structure and enables multi-working modes set of the sub serial ports independently, and supports high-speed communication, and each channel has independent and controllable data broadcasting and receiving function, and all UARTs support IRDA infrared communication.