Analysis of the Back-Gate Effect on the On-State Breakdown Voltage of Smartpower SOI Devices

This paper discusses the impact of the back gate bias on the on-state drain breakdown voltage of high-voltage SOI MOSFETs. This is mandatory in order to understand the physical mechanisms behind the limitations of the safe operation area of SOI power devices. The back gate electrode of the SOI material will add an additional dimension to the safe operation area, thereby causing further reliability constraints on the circuit design. For the first time an analytical model of the breakdown voltage covering the reasonable back gate voltage range is presented providing a first step towards a closed form circuit simulation of this effect. It is shown that the back gate potential impacts on the breakdown behaviour by modulating the carrier distribution in the drift region, the base transport factor of the parasitic bipolar transistor and the drift region resistance.