Double-sampled ΔΣ modulator with 1.5-bit FIR feedback DAC for reduced noise folding and increased power efficiency

A double-sampled delta-sigma modulator (DSM) with a 1.5-bit finite impulse response (FIR) feedback digital-to-analogue converter (DAC) is proposed to avoid noise folding due to the mismatch between feedback paths. The proposed DSM allows the use of the sharing input-sampling capacitor configuration in a switched-capacitor integrator, resulting in lower kT/C noise, smaller area and lower power consumption. It also shapes only the frequency response of the feedback DAC output without modifying the noise transfer function to avoid the signal-to-quantisation noise ratio (SQNR) degradation of conventional techniques. Evaluation results indicate that the proposed double-sampled DSM achieves a 101.5 dB SQNR with 30% lower power and 20% reduced area as compared with conventional double-sampled DSMs.