18.2 A 1.9TOPS and 564GOPS/W heterogeneous multicore SoC with color-based object classification accelerator for image-recognition applications

Image recognition technologies have gained prominence in a variety of fields, such as automotive and surveillance, with dedicated image-recognition ICs being developed recently [1-2]. Image recognition ICs for an advanced driver assistance system (ADAS) have also been proposed [3]. However, future ADAS applications must support greater numbers of real-time recognition processes simultaneously, with higher detection rates and lower false-positive rates. For instance, adaptive cruise control (ACC), an application of ADAS, comprises many image recognition processes, such as pedestrian detection (PD), vehicle detection (VD), general obstacle detection (GOD), lane detection (LD), traffic light recognition (TLR), and traffic sign recognition (TSR). ACC also requires high detection accuracy to prevent unnecessary braking or acceleration. To satisfy these requirements, we have developed an SoC with two 4-core processor clusters and 14 hard-wired accelerators. It is designed to realize the six recognition processes (PD, VD, GOD, LD, TLR, and TSR) for ACC and automatic high beam (AHB) for headlight control. It achieves 1.9TOPS peak performance in 3.37W. This low power consumption enables the SoC to operate with passive cooling in a high-temperature automotive environment.