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Power-efficient cache design using dual-edge clocking scheme in sun openSPARC T1 and alpha AXP processors
Power-efficient cache design using dual-edge clocking scheme in sun openSPARC T1 and alpha AXP processors
2010
Rajesh Kannan Megalingam
M. Arunkumar
V.A. Ashok
K Nived
C. J. Daniel
Nessy Thankachan
V. Vishnu Das
R. Vijayakumar
Narayan C. Debnath
S Janahanlal
Natarajan Meghanathan
Suresh Sankaranarayanan
P. M. Thankachan
Ford Lumban Gaol
Keywords:
Cache
power efficient
OpenSPARC
Parallel computing
Computer science
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