Maintaining lithographic quality during OPC for low kl and MEEF processes constrained by mask dimensional rules.

Mask fabrication rules can interfere with the ability of OPC and RET shape generation to achieve the best lithographic quality on silicon. With low kl lithography, ideal correction shapes dictated by lithography- based simulation frequently violate mask geometry constraints. Because the scaled spatial bandwidth of the wafer lithography process is lower than that of the mask process there are some degrees of freedom in OPC shape generation to optimize for lithographic accuracy and mask compliance together. In this paper we discuss strategies to embed mask rule compliance in correct-by-construction model-based OPC.