Work-in-progress: REDEFINE – a case for WCET-friendly hardware accelerators for real time applications

2017 
REDEFINE is a distributed dynamic dataƒow architecture, designed for exploiting parallelism at various granularities as an embedded system-on-chip (SoC). ‘is paper dwells on the ƒexibility of REDEFINE architecture and its execution model in accelerating real-time applications coupled with a WCET analyzer that computes execution time bounds of real time applications.
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