Xtreme Low Power Technlogy Development Using a Virtual Design Flow: Enabling Technologies for AmbientIntelligence Applications

We outline the issues relating to the development of an xtreme low power (XLP) process option, and its associated logic and memory design styles, targeted for ambient intelligence (AmI) and medical implant applications. The most obvious route to low switching energies is by reducing the supply voltage. For an economically viable process, however, we must also ensure that the resulting clock rates are high enough to entice designers to use the process for real commercial applications. This requires that the impact of XLP technology choices for both the front-end devices and back-end interconnect be assessed at the level of critical path delays and memory access times. Moreover, these technology choices must be selected to be optimum for a range of typical applications designed using the XLP process, and not just for a single benchmark test vehicle. This has led to the development of a virtual design flow for technology assessment, which integrates device, interconnect, logic, and memory design options at the system level. Examples, of how this new design flows, have been used to assess new XLP front-end and back-end technology options will be presented. Data on low voltage system-level operation of standard bulk, metal gate, high-k, and multi-gate CMOS will be discussed.