Real-time debugger with bitstream configurator and C language design control for FPGAs

At the boundary between hardware and software, where FPGAs with 2,000,000 gates is just the beginning, we've found thatthe tools you have in your toolbox make all the difference. With larger and more feature rich programmable devices such asthe VirtexTM Platform FPGA [1,2,3], even minors changes in the design can require hours of compile time. The combinationof design complexity and component size is taxing current design entry and implementation tools, making the design cyclelonger. The simulation-verification cycle doesn't mean the design will work in the fmal product. The engineer needs more