Advanced Four-Mask Process Bottom-Gate Poly-Si TFT via Self-Aligned NiSi 2 Seed-Induced Lateral Crystallization

We report on a method to fabricate high-performance bottom-gate poly-Si (BGPS) thin-film transistors (TFTs) with a four-mask process via self-aligned (SA) NiSi 2 seed-induced lateral crystallization (SILC). Previously, the BGPS TFT crystallized by SILC was reported to have high electrical performance with a simple process. However, this approach still requires an additional mask for lateral crystallization, making the process more complicated and expensive. In this letter, by using the SA-SILC method, only a few NiSi 2 seeds reach the intrinsic Si surface through the side edges of the etch stopper and then crystallize the channel. This SA-SILC enables low metal contamination by a few seeds in the channel, shorter annealing time due to reduced length for SILC, and a simple four-mask process. The SA-SILC BGPS TFTs exhibited a steep subthreshold slope of 0.16 Vdecade $^{\mathrm { {-1}}}$ , a high field-effect mobility of 230 cm $^{2}\text{V}^{-1}\text{s}^{-1}$ , and kink-free output characteristics.