Explanation of threshold voltage scaling in enhancement-mode InAlN/AlN-GaN metal oxide semiconductor high electron mobility transistors on Si substrates

We present enhancement-mode GaN high electron mobility transistors on Si substrates with ZrO2 gate dielectrics of thicknesses t(ox) between 10 and 24 nm. The oxide interlayers between the InAlN/AlN barrier and gate metal allow raising the device threshold voltage up to + 2.3 V and reduce gate leakage current to less than 100 nA/mm with a high drain current on/off ratio of 4 orders of magnitude. We use a model that explains the observed linear dependence of the threshold voltage on tox and allows determining fixed charges at the oxide/barrier interface. (C) 2012 Elsevier B. V. All rights reserved.