Algorithms for IP Block Identification Based on Structural Approach
2019
Technology mapping for macroblocks is a problem of implementing subcircuits in a Boolean circuit with predesigned IP blocks, like multiplexers and arithmetic circuits. In this paper, we propose algorithms for identifying some special kinds of macroblocks in an arbitrary Boolean circuit using dynamic programming and structural approach. Our algorithms can identify n-input standard gates (and-gates, or-gates, xor-gates, nand-gates, nor-gates and xnor-gates) with a large input size n. Also multiplexers and multiplexer buses can be identified using our algorithms.Proposed algorithms were implemented in a C++ programming language. It can identify and substitute specified macroblocks into a Boolean circuit represented in Verilog HDL format. Algorithms were tested on benchmarks from ICCAD- 2013 contest, where similar problem was introduced, and ISCAS- 85 benchmarks were also used to test our algorithms.
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