A 5GHz Duty-Cycle Correcting Clock Distribution Network for the POWER6 Microprocessor
2006
Microprocessor global clock distribution networks use long buffered wires where reflections can be significant. Using accurate transmission-line models and optimization, these reflection effects can be exploited to improve clock-distribution characteristics. The clock distribution network of the P0WER6 microprocessor is designed to run at frequencies exceeding 5GHz using only inverters and transmission lines and is capable of on-the-fly duty-cycle correction
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