Implementation of Digital Down Converter using Resampling filter

Digital Down Converter (DDC) is a major part in lots of Digital Communication Systems. Generally, the filters and mixer are the main parts of DDC. The Advantage of using resampling filter is that it operates on high clock rate, since the operation of recursive single cycle loops are pipelined. Such pipelining is done by using complex multiplexing and parallel processing techniques. Because of sampling the input signals, the output is found to be flexible by creating the output with its output. Look-up table is a common method for creating both complex and real value sinusoidal. In this paper, the DDC design is simulated and enhanced using software system tool ModelSim. This paper represents Design and Implementation of DDC on Xilinx ISE 14.7 version.