Design Methodology for Multiple Output Combinational Circuits Using Cyclic Combinational Technique

Conventional combinational circuits are generally acyclic (feed-forward) but these circuits can have feedbacks (cycles) which will give more minimized expressions as compared to conventional combinational circuits. Deliberate incorporation of such cycles or feedbacks in conventional combinational circuits eventually results in reduction in number of literals in the expression of the combinational circuits. The reduction in literal counts decreases the number of gates required to implement the expressions of the combinational circuits. Hence, the decrease in number of gates leads to reduction in transistor counts or layout area for the circuits. A cyclic combinational circuit (CCC) is defined as the circuit whose output depends on present inputs only, but at the same time contains one or more feedbacks (cycles). This paper presents a simplified methodology for introduction of cycles (feedbacks) and finding expressions for the CCC. The methodology is applied on LGSynth93 benchmark circuits and a reduction up to 28% in literal counts for expressions of CCC was found which is higher than the reduction achieved by other methodologies. Further the methodology is applied to implement binary comparator which has got three multiple outputs using cyclic combinational technique. The circuits are verified through simulation in cadence virtuoso tools using 45nm technology. Based on simulation results, performance parameters like power consumption, propagation delay and layout area of CCC are compared with the conventional circuits.