Delay-time sensitivity in linear RC tree

The study of RC networks is important to understand digital MOS integrated circuits. Several authors studied these networks from the point of view of bounds on voltage waveform [1], [2], signal delay [3], etc. Wyatt [4] developed a qualitative theory of RC meshes having monotone elements. He showed that for a monotone exitation u(t) , the sensitivity of the output node voltage of a nonleaky line is monotonic due to any conductance on the line.