Efficient readout electronics for multi-anode photomultiplier
2010
We present a novel active and analog readout and preprocessing topology for position sensitive photodetectors
(PSPD) that allows to readout a large variety of PSPD devices with different pixel numbers. Additionally, the
topology was designed to allow for a significant reduction of analog-to-digital conversion channels. The circuit
topology replaces the common passive charge divider and consists of N input stages, N × M weighting stages
and M analog adder stages, where N is the number of the input channels, i.e. the number of photodetector
pixels and M is the number of outputs. The circuit performs the multiplication of a matrix (the weights) with
a vector (signals). For this, the input stage makes M copies of each of the N input signals, the weighting stage
multiplies these signal copies with N × M different weights and the output stage adds all weighted copies with
the same copy index. For high flexibility, the weights are programmable and the topology allows to interconnect
several identical circuits for larger N. Measurements with a first prototype ASIC show that the achieved energy
and centroid resolutions equal the resolutions from detectors with passive charge division circuits. However,
the presented topology presents important advantages such as scalability. As a first application, we used the
prototype ASIC to correct the sensitivity inhomogeneity of position sensitive photomultiplier tubes. As a second
application for the circuit, we present a Neural Network based positioning scheme for γ-ray imaging detectors
with thick, monolithic scintillation crystals. This allows to correct the strong border artifacts of the center of
gravity positioning scheme in monolithic scintillation crystals and thus enhances the spatial resolution of the
γ-ray imaging detector.
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