Realización de Circuitos Lógicos en FPGA a partir de su Código en VHDL

The purpose of this paper is to learn the methodology by which from a file writtrn in VHDL, code can be made a logic circuit in an FPGA, for this purpose, as a sample didactical has been taken as an example the realization of an XOR logic gate inside the FPGA, the same procedure could be applied to many more complex circuits. It details the process of synthesis, implementation simulation and FPGA programming, it uses the development system "XU Virtex-II Pro" which contains the integrated circuit "XC2VP30" within which is embedded an FPGA. The ISE WebPack 10.1, free distribution, and optionally the simulator ModelSim XE are used as software tools.