MOSFET C-V Characteristics Extraction Based on Ring Oscillator with Addressable DUTs

In this paper, a test structure of ring oscillator (RO) with addressable devices under test (DUTs) is described for the extracting of MOSFET capacitance-voltage (C-V) curves. With a high oscillation frequency, the influence of the gate-leakage current will be reduced to negligible. The addressable array and its calibration method in this work mitigate the impact from the layout, spatial and process variations, and improve the test accuracy. Moreover, the consumption of the layout area and test lines are also reduced by this structure.