A fisheye distortion correction algorithm optimized for hardware implementations

This paper presents a universal algorithm for correcting distortion in images obtained with fisheye lenses. We analyze and optimize the algorithm for implementation on hardware platforms such as Field Programmable Gate Arrays (FPGAs). A fully pipelined architecture, implemented in an FPGA, is capable of processing full HD images at 30 frames per second. Furthermore the proposed algorithmic modifications introduce very little error in fixed point arithmetic pixel coordinate computations. When compared to double precision results, most coordinates have an error of less than 0.5 pixel.