Heat Mitigation in 3D ICs by Improvised TTSV Structure

To get rid of the diverse factors and limitations originated in the conventional planer integration design, 3-dimensional (3D) integration seems to be one of the best replacing signatures in current era. But, thermal issues are the major constraint for the wide spread application, further growth and advancement to these highly budding integration techniques. To reduce the generated heat within the 3D IC cooling through the thermal through silicon via (TTSV) is one of the best possible recognized techniques. This paper is intended to provide some realistic regulation to the design of TTSV for effective management thermal heat mitigation. The temperature dependent results for the hotspot alignment issues are also discussed and compared for different TTSV outer materials along with the utilization of time dependent temperature fluctuation generated within the 3D IC active layers.