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We review the development of MRAM technology at Everspin, focusing on both toggle MRAM, which is used in our current commercial products, and spintorque MR AM, which offers significant potential for cell size reduction that could enable higher memory densities. Toggle MRAM uses magnetic fields for programming the bits with a particular free layer structure, bit orientation, and write pulse sequence to avoid the halfselect di sturbs present in other fieldwriting techniques. We find excellent read, write, and reliability performance with toggle MRAM and the potential for continued scaling beyond our current 16Mb memory size. Next, we describe spintorque M RAM, its development challenges and expected performance attributes, and the results of our sub100 nm spintor que bits, with both CoFeB and NiFe free layers, integrated into 16kb CMOS arrays. We measure an intrinsic array separation between the spintorque switching and br eakdown voltage distributions >12 σ for bits with a magnetic stability against thermal disturbs Eb / kbT ≈ 52 sufficient for a 10 year data retention lifetime.