A process for producing a semiconductor device with strained interlayer using a Ätzsteuerzwischenschicht increased thickness

A method comprising: conformally depositing a first stress-inducing dielectric layer (230) via a plurality of first gate electrode structures (221) and second plurality of gate electrode structures (221) of a semiconductor device (200), said first and second gate electrode structures (221) are at least partially formed over a semiconductor layer; Forming a Atzsteuerschicht (231) on the first stress-inducing layer (230) such that a specified filling level of the first stress-inducing layer (230) and the Atzsteuerschicht (231) in a space region between two adjacent gate electrode structures (221) is reached, wherein the specified filling level at least half a height of the plurality of first and second gate electrode structures (221) corresponds to; selectively removing the Atzsteuerschicht (231) and the first stress-inducing layer (230) of the second plurality of gate electrode structures (221); Depositing a second stress-inducing dielectric layer (240) over the Atzsteuerschicht (231) and the first stress-inducing layer (230) and the second plurality of gate electrode structures (221); and selectively removing the second stress-inducing layer (240) from the first stress-inducing layer (230) by performing a ...