Bending Strength Evaluation of Si Interposers by PoEF Test Associated With Acoustic Emission Method

The 2.5-D IC packaging technology is to apply a silicon interposer with Cu through silicon vias (Cu TSVs) as a platform to interconnect and integrate heterogeneous and homogeneous chips horizontally and vertically. The existing Cu TSVs might make the silicon interposers more fragile, due to their structural non-homogeneity and weak interfaces. Thus, the strength determination of silicon interposers becomes one of the important issues for ensuring reliability of 2.5-D packages. This paper aims to determine the bending strengths of silicon interposers (with back-side and front-side surface controls—corresponding to the surfaces with C4 bumps and Cu/SiO 2 layers, respectively) using a point-load-on-elastic-foundation test, associated with an acoustic emission (AE) method to detect local material cracks or delamination occurring during the test before interposer breaking. The results indicate that there are a few less-than 50-dB AE signals occurring before interposer breaking, due to the micropad crush on the Cu/SiO 2 layer induced by the loading-pin contact for the back-side control case, but not for the front-side control case. In addition, interposer breaking is found to be triggered by the maximum tensile stresses located at the corner of the C4 bump pad for the back-side control case, instead of the micropad crush or Cu TSVs, while at the silicon or Cu/SiO 2 layer for the front-side control case. These failure behaviors have been confirmed by theory-validated finite element simulation. The bending strengths of silicon interposers have further been determined by using experimental data associated with finite element analysis by taking into account Cu material nonlinear properties and the Cu/SiO 2 layer.