Experimental demonstration of planar SiGe on Si TFETs with counter doped pocket

This paper presents both experimental and TCAD simulation results on a planar tunneling field-effect transistor (TFET) using compressively strained Si 0.45 Ge 0.55 on Si. Introducing a counter doped pocket at the source tunnel junction in combination with a selective and self-adjusted silicidation to enlarge the tunneling area enables line tunneling aligned with the gate electric field which results in an enhanced band-to-band tunneling (BTBT) probability, increased on-current I on and reduced inverse subthreshold swing (SS).