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Templated DSA vias in sub-7 nm circuits: Design strategy and DSA-aware via decomposition
Templated DSA vias in sub-7 nm circuits: Design strategy and DSA-aware via decomposition
2016
Ioannis Karageorgos
Julien Ryckaert
Roel Gronheid
Maryann C. Tung
H.-S. Philip Wong
Evangelos Karageorgos
Joost Bekaert
Geert Vandenberghe
Wim Dehaene
Keywords:
Electronic circuit
Electronic engineering
Design strategy
Computer science
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directed self assembly
Correction
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