Integrated vertical semiconductor device

Integrated vertical semiconductor device on an n-substrate having a lying on a rear side potential rear connection and a correlating with the back of potential electrical quantity delivered integrated switching means, characterized in that the switching means is arranged vertically and that the electrical quantity is a current and in that the switching means having a penetration depth (t) having upper p-Dotierzone with a hole (20), which is free of p-doping, and in that the hole (20) via a heavily n-doped transition zone with a metal contact (22) is contacted, and that the upper p-Dotierzone is formed as one of a logic well (5) separate p-measuring tank (50) and from the logic well (5) is separated laterally with incorporated therein logic elements and that the diameter (D) of the hole (20) is about the depth of penetration (t) corresponding to the upper p-Dotierzone.