Modeling method for SOI (silicon on insulator) H-gate MOS (metal oxide semiconductor) device

The present invention provides a method of modeling the SOI MOS devices, the SOI MOS device wherein the device H as the SOI MOS type gate, the method comprising: a) establishing a primary model MOS device comprising the SOI MOS devices, and analog bar gate extended drain body PN junction side capacitance model overall model to simulate extending the source body PN junction side surface of the capacitor source body PN junction side capacitor model and simulate extended drain body PN junction side surface of the capacitor; b) primary MOS device model overall model and source body side extending PN junction capacitance model body and extended drain side junction capacitance PN model parameters are extracted. The present invention provides a method of modeling the effect of H-type gate consideration SOI MOS device, the source body extending side junction capacitance of the junction side surface thereof and extending drain capacitance device performance, improve the accuracy of the model can be effectively applied to the device simulation design.