Dual-gate HFET with closely spaced electrodes on InP

An InGaAs/AlInAs dual-gate HFET with two closely spaced gate electrodes deposited in a common gate recess has been fabricated on InP substrate. The configuration consists of an 0.25 /spl mu/m RF-driven /spl Gamma/-gate overlapping to the source and a DC-trapezoid control gate placed approximately 0.2 /spl mu/m behind the /spl Gamma/-gate. The fabrication sequence allows one to test the device as a single gate FET before deposition of the second gate. The influence of the second gate on the transistor performance was characterized under DC- and RF-conditions. The device current could be fully modulated by either gate and the small signal RF behaviour could be tested in all modes of operation with the second gate RF-grounded. In comparison with the single gate FET, the dual-gate configuration shows an essentially reduced feedback behaviour with reduced C/sub dg/ and G/sub ds/ however, slightly increased input capacitance C/sub gs/. At V/sub ds/=1.2 V f/sub max/ is enhanced by 40%, from 190 GHz to 260 GHz, whereas the gain-bandwidth product decreases from 90 GHz to 70 GHz. The increase of f/sub max/ is strongly drain bias dependent and increases steeply beyond V/sub ds/=1.0 V.