FEBRIS: a chip for pattern recognition

1987 
A chip that performs and evaluates a 16/spl times/16-pixel comparison for application in pattern recognition systems is described. The on-chip data organization and the Wallace-tree evaluation circuits are described. The chip has been realized in a 2-/spl mu/m NMOS process and operated at 18 MHz, thus performing four gigapixel operations per second.
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