Charge Trapping Memory with Al 2 O 3 /HfO 2 /Al 2 O 3 Multilayer High-κ Dielectric Stacks and High Work Function Metal Gate Featuring Improved Operation Efficiency

In this work, we have proposed a type of charge trapping memory (CTM) device with Al 2 O 3 /HfO 2 /Al 2 O 3 tri-layer high-κ dielectric stacks and high work function tungsten metal gate (named as MAHAS in short). The interfacial mismatch of high-κ/Si system for the MAHAS memory is comparatively low owing to the optimized high-κ/Si interface quality. The MAHAS memory devices demonstrate desirable memory effects, especially significantly improved program and erase (P/E) speed. A large hysteresis memory window of 5.4 V by ±10 V sweeping voltage and ~2.7 V flat band voltage shift by programming at +7 V for 100 μs are obtained. With respect to memory reliability, the MAHAS memory shows minor memory window degradation after 10 6 P/E cycles, and the memory window retains 72.4% of the originally stored charge even after 10 5 s’ retention. Therefore, the proposed MAHAS memory device exhibits great potential for future nonvolatile charge trapping memory applications.