Design of low power 12bit 40MSPS SAR ADCs with a redundancy algorithm and digital calibration for high dynamic range calorimeter readout
2016
We present two SAR ADCs using a generalized redundant search algorithm and offering the
flexibility to relax the requirements on the DAC settling time. Two more bits of redundancy
allow also a digital calibration, based on a code density analysis to compensate the capacitors
mismatching effects. A monotonic switching algorithm is used for these prototypes saving
about 70% of dynamic power consumption compared to conventional switching algorithm.
A fully differential was used for both prototypes featuring 12bit 40MS/s in a CMOS 130nm
1P8M process
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