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A Novel Optimal 2-D Layout for Cache Memory at 45nm CMOS Technology
A Novel Optimal 2-D Layout for Cache Memory at 45nm CMOS Technology
2015
Komal Komal
Mohit Saxena
Shashank Chaturvedi
Neeraj Kr. Shukla
Keywords:
Computer architecture
CPU cache
Computer science
CMOS
Correction
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