Scan driver and display apparatus having the same

The scan driver is synchronized with the first-first transistor, the second clock signal in response to the voltage of the first control node for applying the n-1 scan driving gate signals in response to the first clock signal to the first control node the n-th second transistor in response to a 1-8, a 1-6, a transistor, and the second control node for applying a first gate voltage in response to the first clock signal to a second control node for outputting a gate signal including a first transistor 1-7 to output to the n-th gate signals, the gate voltage first signal generator ( 'n' is a natural number), and the first to the n-1 compensation control signal in response to the third clock signal 3 the second-first transistor to be applied to the control node, in response to the voltage of the third control node, the first gate voltage to the transistor in response to claim 2-6, wherein the second clock signal and outputting the n-th compensation control signal supply the first gate before the four control nodes It includes in response to the voltage of the fourth transistor, and a 2-5 control node for applying a second pressure signal generated containing 2-3 transistor for outputting the second gate voltage to the n-th compensation control signal .