Slip generation during rapid thermal processing

The generation of slip in 100 mm (100) silicon wafers during rapid thermal oxidation is investigated in dependence on process temperature, process duration, and heating rate. The processes were carried out in a scalar controlled RTP equipment with three-zone rotation-symmetrical illumination. The wafer temperature was measured in three points (centre, edge, half distance between both) by thermopiles during the whole process. In addition, the oxidation temperature was monitored. X-ray topography investigations show that slip lines are generated at process temperatures higher than 1050 °C, that the length of the slip lines increases with higher process temperature and reaches a saturation value for long process times. The experiments and the simulations provided that for ramp rates <200 K/s slip dislocation lines are formed during the processing period of constant temperature.