A Mixed Level Simulation Environment for Stepwise RTOS Software Refinement
2010
In this article, we present a flexible simulation environment for embedded real-time software refinement by a mixed level cosimulation. For this, we combine the native speed of an abstract real-time operating system (RTOS) model in SystemC with dynamic binary translation for fast Instruction Set Simulation (ISS) by QEMU. In order to support stepwise RTOS software refinement from system level to the target software, each task can be separately migrated between the native execution and the ISS. By adapting the dynamic binary translation approach to an efficient but yet very accurate synchronization scheme the overhead of QEMU user mode execution is only factor two compared to native SystemC. Furthermore, the simulation speed increases almost linearly according to the utilization of the task set abstracted by the native execution. Hereby, the simulation time can be considerably reduced by cosimulating just a subset of tasks on QEMU.
Keywords:
- Instruction set simulator
- Computer architecture
- SystemC
- Software
- Application programming interface
- Computer architecture simulator
- Electronic system-level design and verification
- Real-time computing
- Binary translation
- Instruction set
- Computer science
- Operating system
- Real-time operating system
- Synchronization
- Embedded system
- Correction
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